The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 04, 2023
Filed:
Dec. 24, 2019
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Mark Bordogna, Andover, MA (US);
Jonathan A. Robinson, Portland, OR (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/14 (2006.01); H04L 43/106 (2022.01); G06F 9/54 (2006.01); G06F 1/12 (2006.01);
U.S. Cl.
CPC ...
G06F 1/14 (2013.01); G06F 1/12 (2013.01); G06F 9/542 (2013.01); H04L 43/106 (2013.01);
Abstract
Examples described herein relate to multiple processor nodes which are physically separate with interfaces to a common network interface. A local processor can run a timing recovery algorithm, and tune the master timer to align with the network domain to cause the master timer and network timing domains to be in the same domain. A common master timer can be used to align time stamps of independent processor nodes. A processor node can use the common master timer as a reference and the processor does not need to communicate with another processor to synchronize its timer.