The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 27, 2023

Filed:

Feb. 17, 2020
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventor:

Olaf Hohlfeld, Warstein, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 24/34 (2013.01); H01L 27/1248 (2013.01); H01L 2224/32013 (2013.01); H01L 2224/32054 (2013.01); H01L 2224/32055 (2013.01); H01L 2224/32056 (2013.01); H01L 2224/32059 (2013.01); H01L 2224/32113 (2013.01); H01L 2224/32258 (2013.01); H01L 2224/49175 (2013.01);
Abstract

A semiconductor arrangement includes a semiconductor substrate having a dielectric insulation layer and at least a first metallization layer arranged on a first side of the dielectric insulation layer. The first metallization layer includes at least two sections, each section being separated from a neighboring section by a recess. A semiconductor body is arranged on one of the sections of the first metallization layer. At least one indentation is arranged between a first side of the semiconductor body and a closest edge of the respective section of the first metallization layer. A distance between the first side and the closest edge of the section of the first metallization layer is between 0.5 mm and 5 mm.


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