The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2023
Filed:
Jun. 11, 2021
Applicant:
Ap Memory Technology Corporation, Hsinchu County, TW;
Inventor:
Wenliang Chen, Hsinchu County, TW;
Assignee:
AP MEMORY TECHNOLOGY CORPORATION, Hsinchu County, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/522 (2006.01); H01L 21/48 (2006.01); H01L 23/528 (2006.01); G11C 5/06 (2006.01); H01L 23/00 (2006.01); H01L 21/768 (2006.01); G11C 11/409 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); G11C 5/06 (2013.01); G11C 11/409 (2013.01); H01L 21/486 (2013.01); H01L 21/76802 (2013.01); H01L 23/528 (2013.01); H01L 24/14 (2013.01);
Abstract
A DRAM chiplet structure is provided. The DRAM chiplet structure includes a first hybrid bonding structure, a DRAM interface structure, and a first DRAM core structure. The first hybrid bonding structure has a first surface and a second surface. The DRAM interface structure is in contact with the first surface of the first hybrid bonding structure. The first DRAM core structure is in contact with the second surface of the first hybrid bonding structure. The DRAM interface structure is electrically connected to the first DRAM core structure through the first hybrid bonding structure.