The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 20, 2023

Filed:

Mar. 31, 2021
Applicants:

Leading Interconnect Semiconductor Technology Qinhuangdao Co., Ltd., Qinhuangdao, CN;

Qi Ding Technology Qinhuangdao Co., Ltd., Qinhuangdao, CN;

Leading Interconnect Semiconductor Technology (Shenzhen) Co., Ltd., Shenzhen, CN;

Inventors:

Chun-Chieh Huang, Taoyuan, TW;

Chin-Ming Liu, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 3/46 (2006.01); H05K 1/18 (2006.01); H05K 3/28 (2006.01);
U.S. Cl.
CPC ...
H05K 1/186 (2013.01); H05K 3/284 (2013.01); H05K 3/4697 (2013.01); H05K 2203/308 (2013.01);
Abstract

A package circuit structure includes a multilayer circuit board, an electronic component, and an insulating layer. The multilayer circuit board includes a metal portion and an opening. The opening is extending from a first side of the multilayer circuit board toward the second side of the multilayer circuit board facing the first side. A bottom of the opening is sealed by the metal portion. The electronic component is received in the opening and adhered to the metal portion. The electronic component is electrically connected to the multilayer circuit board and encapsulated in the opening by the insulating layer. A method for manufacturing the package circuit structure is also provided.


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