Vertical transistor structure with buried channel and resurf regions and method of manufacturing the same

Abstract

The present disclosure describes vertical transistor device and methods of making the same. The vertical transistor device includes substrate layer of first conductivity type, drift layer of first conductivity type formed over substrate layer, body region of second conductivity type extending vertically into drift layer from top surface of drift layer, source region of first conductivity type extending vertically from top surface of drift layer into body region, dielectric region including first and second sections formed over top surface, buried channel region of first conductivity type at least partially sandwiched between body region on first side and first and second sections of dielectric region on second side opposite to first side, gate electrode formed over dielectric region, and drain electrode formed below substrate layer. Dielectric region laterally overlaps with portion of body region. Thickness of first section is uniform and thickness of second section is greater than first section.