The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2023

Filed:

Mar. 31, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Sreenivasan K. Koduri, Dallas, TX (US);

Steven R. Tom, Dallas, TX (US);

Paul Brohlin, Parker, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/56 (2006.01); H01L 25/16 (2023.01); H01L 23/498 (2006.01); H01L 23/13 (2006.01); H01L 21/48 (2006.01); H01L 23/373 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 21/4846 (2013.01); H01L 23/13 (2013.01); H01L 23/49838 (2013.01); H01L 25/162 (2013.01); H01L 23/3121 (2013.01); H01L 23/367 (2013.01); H01L 23/3735 (2013.01); H01L 23/3736 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 2224/48137 (2013.01); H01L 2224/48225 (2013.01); H01L 2224/49175 (2013.01);
Abstract

In a described example, an apparatus includes: a first mold compound partially covering a thermal pad that extends through a pre-molded package substrate formed of a first mold compound, a portion of the thermal pad exposed on a die side surface of the pre-molded package substrate, the pre-molded package substrate having a recess on the die side surface, with an exposed portion of the thermal pad and a portion of the first mold compound in a die mounting area in the recess; a semiconductor die mounted to the thermal pad and another semiconductor die mounted to the mold compound in the die mounting area; wire bonds coupling bond pads on the semiconductor dies to traces on the pre-molded package substrate; and a second mold compound over the die side surface of the pre-molded package substrate and covering the wire bonds, the semiconductor dies, the recess, and a portion of the traces.


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