The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 13, 2023

Filed:

Aug. 13, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Paul J. Diglio, Gaston, OR (US);

Joseph F. Walczyk, Tigard, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 1/073 (2006.01); G01R 1/04 (2006.01); G01R 31/28 (2006.01);
U.S. Cl.
CPC ...
G01R 1/07364 (2013.01); G01R 1/04 (2013.01); G01R 1/07342 (2013.01); G01R 31/2831 (2013.01); G01R 31/2891 (2013.01);
Abstract

Planar error between a probe card and a semiconductor wafer may be reduced with a low-profile gimbal platform. The low-profile gimbal platform may be coupled between a probe card and a tester head. The low-profiled gimbal platform includes a number of linear actuators and pistons that are used to perform high-precision in situ planarity adjustments to the probe card to achieve co-planarity between the probe card and the semiconductor wafer. The in situ planarity adjustments may reduce the likelihood of malfunctions due to misalignment of the probe card.


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