The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Oct. 22, 2020
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Minkyung Kang, Yongin-si, KR;

Byungsoo So, Yongin-si, KR;

Jaewoo Jeong, Yongin-si, KR;

Jongjun Baek, Yongin-si, KR;

Hiroshi Okumura, Yongin-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Yongin-Si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 51/00 (2006.01); H01L 27/32 (2006.01); H01L 51/56 (2006.01);
U.S. Cl.
CPC ...
H01L 51/0097 (2013.01); H01L 27/3244 (2013.01); H01L 51/56 (2013.01); H01L 2251/5338 (2013.01);
Abstract

A method of manufacturing a display apparatus includes forming a first substrate on a support substrate; forming a first barrier layer on the first substrate; and forming a conductive layer by implanting n-type impurities or p-type impurities in the first barrier layer and at least a portion of the first substrate. A display apparatus includes a conductive layer arranged on a substrate and a barrier layer arranged on the conductive layer. The conductive layer is doped with n-type impurities when the first barrier layer is doped with n-type impurities, and the conductive layer is doped with p-type impurities when the first barrier layer is doped with p-type impurities.


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