The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Mar. 04, 2020
Applicant:

National Yang Ming Chiao Tung University, Hsinchu, TW;

Inventors:

Edward Yi Chang, Hsinchu County, TW;

Shih-Chien Liu, Taoyuan, TW;

Chung-Kai Huang, Kaohsiung, TW;

Chia-Hsun Wu, Kaohsiung, TW;

Ping-Cheng Han, Taichung, TW;

Yueh-Chin Lin, New Taipei, TW;

Ting-En Hsieh, Tainan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/51 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/516 (2013.01); H01L 29/40117 (2019.08); H01L 29/4234 (2013.01);
Abstract

A semiconductor device includes a substrate, a channel layer, a barrier layer, a ferroelectric composite material layer, a gate, a source and a drain. The channel layer and the barrier layer having a recess are disposed on the substrate in sequence. The ferroelectric composite material layer including a first dielectric layer, a charge trapping layer, a first ferroelectric material layer, a second dielectric layer and a second ferroelectric material layer is disposed in the recess. The gate is disposed on the ferroelectric composite material layer. The source and the drain are disposed on the barrier layer.


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