The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Jan. 05, 2022
Applicant:

X-celeprint Limited, Dublin, IE;

Inventors:

Ronald S. Cok, Rochester, NY (US);

Joseph Carr, Chapel Hill, NC (US);

Assignee:

X-Celeprint Limited, Dublin, IE;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 21/66 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/576 (2013.01); H01L 22/20 (2013.01); H01L 22/34 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06534 (2013.01); H01L 2225/06568 (2013.01); H01L 2225/06596 (2013.01);
Abstract

A method of making a secure integrated-circuit system comprises providing a first integrated circuit in a first die having a first die size and providing a second integrated circuit in a second die. The second die size is smaller than the first die size. The second die is transfer printed onto the first die and connected to the first integrated circuit, forming a compound die. The compound die is packaged. The second integrated circuit is operable to monitor the operation of the first integrated circuit and provides a monitor signal responsive to the operation of the first integrated circuit. The first integrated circuit can be constructed in an insecure facility and the second integrated circuit can be constructed in a secure facility.


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