The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Jan. 05, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventor:

Tung-Jiun Wu, Hsinchu County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5223 (2013.01); H01L 21/7684 (2013.01); H01L 21/76864 (2013.01); H01L 21/76871 (2013.01); H01L 21/76877 (2013.01); H01L 23/5226 (2013.01); H01L 28/60 (2013.01);
Abstract

A method of manufacturing a semiconductor structure includes: forming an interconnect structure including a metallization layer over a substrate; depositing a first dielectric layer over the metallization layer; depositing a second dielectric layer over and separate from the first dielectric layer; depositing a third dielectric layer over the second dielectric layer, the third dielectric layer having a Young's modulus greater than that of the first and second dielectric layers; forming a capacitor structure over the third dielectric layer; and forming a conductive via extending through the capacitor structure and the first, second and third dielectric layers and electrically coupled to the metallization layer.


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