The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Oct. 29, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Aaron Yip, Los Gatos, CA (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); H01L 27/11524 (2017.01); H01L 27/1157 (2017.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); G11C 16/26 (2006.01); G11C 16/14 (2006.01); G11C 16/08 (2006.01); H01L 27/11575 (2017.01);
U.S. Cl.
CPC ...
G11C 16/0483 (2013.01); G11C 16/0458 (2013.01); H01L 27/1157 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); G11C 16/08 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); G11C 2216/02 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01);
Abstract

Some embodiments include apparatuses, and methods of operating the apparatuses. Some of the apparatuses include a data line, a first memory cell string including first memory cells located in different levels of the apparatus, first access lines to access the first memory cells, a first select gate coupled between the data line and the first memory cell string, a first select line to control the first select gate, a second memory cell string including second memory cells located in different levels of the apparatus, second access lines to access the second memory cells, the second access lines being electrically separated from the first access lines, a second select gate coupled between the data line and the second memory cell string, a second select line to control the second select gate, and the first select line being in electrical contact with the second select line.


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