The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Jun. 23, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Abhishek R. Appu, El Dorado Hills, CA (US);

Altug Koker, El Dorado Hills, CA (US);

John C. Weast, Portland, OR (US);

Mike B. Macpherson, Portland, OR (US);

Dukhwan Kim, San Jose, CA (US);

Linda L. Hurd, Cool, CA (US);

Sara S. Baghsorkhi, San Jose, CA (US);

Justin E. Gottschlich, Santa Clara, CA (US);

Prasoonkumar Surti, Folsom, CA (US);

Chandrasekaran Sakthivel, Sunnyvale, CA (US);

Joydeep Ray, Folsom, CA (US);

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06T 1/20 (2006.01); H04L 67/10 (2022.01); G06F 9/54 (2006.01); G06N 3/063 (2023.01); G06N 3/084 (2023.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01);
U.S. Cl.
CPC ...
G06T 1/20 (2013.01); G06F 9/544 (2013.01); G06N 3/044 (2023.01); G06N 3/045 (2023.01); G06N 3/063 (2013.01); G06N 3/084 (2013.01); H04L 67/10 (2013.01);
Abstract

A mechanism is described for facilitating sharing of data and compression expansion of models at autonomous machines. A method of embodiments, as described herein, includes detecting a first processor processing information relating to a neural network at a first computing device, where the first processor comprises a first graphics processor and the first computing device comprises a first autonomous machine. The method further includes facilitating the first processor to store one or more portions of the information in a library at a database, where the one or more portions are accessible to a second processor of a computing device.


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