The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2023
Filed:
Feb. 19, 2021
Applicant:
Synopsys, Inc., Mountain View, CA (US);
Inventors:
Peilin Jiang, Santa Clara, CA (US);
Mayukh Bhattacharya, Palo Alto, CA (US);
Chih Ping Antony Fan, Saratoga, CA (US);
Assignee:
Synopsys, Inc., Mountain View, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/367 (2020.01); G06N 7/00 (2023.01); G06F 111/04 (2020.01); G06F 111/10 (2020.01); G06F 119/12 (2020.01);
U.S. Cl.
CPC ...
G06F 30/367 (2020.01); G06N 7/005 (2013.01); G06F 2111/04 (2020.01); G06F 2111/10 (2020.01); G06F 2119/12 (2020.01);
Abstract
Systems and methods for automatic test pattern generation (ATPG) for parametric faults are described. A model may be constructed to predict a measurement margin for an integrated circuit (IC) design based on a random sample of random variables. A set of failure events may be determined for the IC design using the model, where each failure event may correspond to a set of values of the random variables that is expected to cause a metric for the IC design to violate a threshold.