The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 06, 2023

Filed:

Jul. 21, 2020
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Stefano Facchin, Cork, IE;

Baptiste Grave, Douglas, IE;

Bharani Chava, Cork, IE;

David Jonathan Walshe, Cork, IE;

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1368 (2006.01); G02F 1/1362 (2006.01); G01R 19/165 (2006.01); H01L 23/528 (2006.01); H01L 27/092 (2006.01); H01L 29/24 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
G01R 19/16519 (2013.01); G02F 1/136286 (2013.01); H01L 23/5286 (2013.01); H01L 27/092 (2013.01); H01L 29/24 (2013.01); H01L 29/7869 (2013.01); G02F 1/1368 (2013.01);
Abstract

An IC is provided. The IC includes a power grid including Mlayer interconnects extending in a first direction on an Mlayer and Mlayer interconnects extending in a second direction orthogonal to the first direction on an Mlayer, where x>5. In addition, the IC includes a plurality of power switches. Further, the IC includes at least one sensing element located between the Mlayer and the Mlayer and configured to measure a voltage drop to devices powered by the plurality of power switches. The one or more of the plurality of power switches may be located below the power grid. The power switches of the plurality of power switches may be adjacent in the first direction and in the second direction to each sensing element of the at least one sensing element.


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