The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 30, 2023
Filed:
Jan. 20, 2022
United Microelectronics Corp., Hsin-Chu, TW;
Shi-You Liu, Kaohsiung, TW;
Tsai-Yu Wen, Tainan, TW;
Ching-I Li, Tainan, TW;
Ya-Yin Hsiao, Taipei, TW;
Chih-Chiang Wu, Tainan, TW;
Yu-Chun Liu, Miaoli County, TW;
Ti-Bin Chen, Tainan, TW;
Shao-Ping Chen, Kaohsiung, TW;
Huan-Chi Ma, Tainan, TW;
Chien-Wen Yu, Kaohsiung, TW;
UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;
Abstract
A method for fabricating p-type field effect transistor (FET) includes the steps of first providing a substrate, forming a pad layer on the substrate, forming a well in the substrate, performing an ion implantation process to implant germanium ions into the substrate to form a channel region, and then conducting an anneal process to divide the channel region into a top portion and a bottom portion. After removing the pad layer, a gate structure is formed on the substrate and a lightly doped drain (LDD) is formed adjacent to two sides of the gate structure.