The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 30, 2023

Filed:

Jul. 12, 2021
Applicant:

Stmicroelectronics, Inc., Coppell, TX (US);

Inventor:

John H. Zhang, Altamont, NY (US);

Assignee:

STMICROELECTRONICS, INC., Coppell, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 49/02 (2006.01); H01L 27/108 (2006.01); H01L 27/11507 (2017.01);
U.S. Cl.
CPC ...
H01L 28/56 (2013.01); H01L 21/02197 (2013.01); H01L 27/108 (2013.01); H01L 27/10805 (2013.01); H01L 27/10844 (2013.01); H01L 27/11507 (2013.01); H01L 28/55 (2013.01); H01L 28/60 (2013.01); H01L 28/65 (2013.01); H01L 29/40111 (2019.08);
Abstract

An interconnect structure for use in coupling transistors in an integrated circuit is disclosed, including various configurations in which ferroelectric capacitors exhibiting negative capacitance are coupled in series with dielectric capacitors. In one embodiment, the negative capacitor includes a dielectric/ferroelectric bi-layer. When a negative capacitor is electrically coupled in series with a conventional dielectric capacitor, the series combination behaves like a stable ferroelectric capacitor for which the overall capacitance can be measured experimentally, and tuned to a desired value. The composite capacitance of a dielectric capacitor and a ferroelectric capacitor having negative capacitance coupled in series is, in theory, infinite, and in practice, very large. A series combination of positive and negative capacitors within a microelectronic interconnect structure can be used to make high capacity DRAM memory cells.


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