The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2023
Filed:
May. 07, 2021
Applicant:
Kepler Computing Inc., San Francisco, CA (US);
Inventors:
Niloy Mukherjee, San Ramon, CA (US);
Ramamoorthy Ramesh, Moraga, CA (US);
Sasikanth Manipatruni, Portland, OR (US);
James Clarkson, Berkeley, CA (US);
FNU Atiquzzaman, Orinda, CA (US);
Gabriel Antonio Paulius Velarde, San Leandro, CA (US);
Jason Y. Wu, Albany, CA (US);
Assignee:
Kepler Computing Inc., San Francisco, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11507 (2017.01); H01L 27/11502 (2017.01); H01L 49/02 (2006.01); H01L 27/11597 (2017.01); H01L 27/11592 (2017.01); H01L 27/11587 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11597 (2013.01); H01L 27/11502 (2013.01); H01L 27/11507 (2013.01); H01L 27/11587 (2013.01); H01L 27/11592 (2013.01); H01L 28/55 (2013.01); H01L 28/57 (2013.01); H01L 28/75 (2013.01);
Abstract
Described are ferroelectric device film stacks which include a templating or texturing layer or material deposited below a ferroelectric layer, to enable a crystal lattice of the subsequently deposited ferroelectric layer to template off this templating layer and provide a large degree of preferential orientation despite the lack of epitaxial substrates.