The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Mar. 17, 2022
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Venugopal Santhanam, Karnataka, IN;

Ketankumar Sheth, Karnataka, IN;

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/15 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1515 (2013.01); H03M 13/6563 (2013.01);
Abstract

A multi-port, multi-mode Reed Solomon (RS) forward error correction system includes a plurality of data in lines, each associated with a data port. The system includes a syndrome block (SDM) that has a plurality of syndrome slices and a SDM switching logic. An input of a SDM slice couples with a data in line from the plurality of data in lines. The switching logic couples with an interface port width (IFW) line a mode line. The IFW line identifies a number of data in lines tied together and the mode line to identify a RS mode. A reformulated inversionless Berlekamp-Massey (RiBM) block has a plurality of RiBM slices and a RiBM switching logic. A Chien Forney (ChFr) block has a plurality of ChFr slices. An error evaluation magnitude (ErEval) block has a plurality of ErEval slices. A plurality of adders couple with an output of a corresponding ErEval slice.


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