The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Sep. 30, 2020
Applicant:

Nxp Usa, Inc., Austin, TX (US);

Inventors:

Marina Zelner, Burlington, CA;

Andrew Vladimir Claude Cervin, Oakville, CA;

Edward Horne, Burlington, CA;

Assignee:

NXP USA, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01G 7/06 (2006.01); H01L 21/3115 (2006.01); H01L 23/373 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01G 7/06 (2013.01); H01L 21/3115 (2013.01); H01L 23/3735 (2013.01); H01L 28/55 (2013.01); H01L 28/91 (2013.01);
Abstract

A process that incorporates teachings of the subject disclosure may include, for example, providing a first silicon dioxide layer on the silicon substrate, depositing a modifier layer on the first silicon dioxide layer, depositing a second silicon dioxide layer on the modifier layer to form a multilayer initial oxide and annealing the multilayer initial oxide resulting in an annealed multilayer initial oxide. The annealing causes diffusion of modifier species from the modifier layer into the first and second silicon dioxide layers and results in amorphous polysilicates. The first and second silicon dioxide layers have thicknesses that prevent the diffusion of the modifier species from reaching top and bottom interfaces of the annealed multilayer initial oxide. Other embodiments are disclosed.


Find Patent Forward Citations

Zelner, Marina. (2023). Method and apparatus for compensating for high thermal expansion coefficient mismatch of a stacked device (U.S. Patent No. 11657981). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11657981

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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