The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Jul. 22, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventor:

Tien-Chun Yang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/28 (2006.01); G11C 7/06 (2006.01); G11C 11/16 (2006.01); G11C 7/00 (2006.01); G11C 7/14 (2006.01); G11C 11/56 (2006.01); G11C 16/34 (2006.01); G11C 29/02 (2006.01); G11C 16/30 (2006.01); G11C 5/02 (2006.01); H03K 5/24 (2006.01);
U.S. Cl.
CPC ...
G11C 16/28 (2013.01); G11C 7/00 (2013.01); G11C 7/062 (2013.01); G11C 7/14 (2013.01); G11C 11/1673 (2013.01); G11C 11/5642 (2013.01); G11C 16/30 (2013.01); G11C 16/349 (2013.01); G11C 29/021 (2013.01); G11C 29/028 (2013.01); H03K 5/2472 (2013.01); G11C 5/02 (2013.01); G11C 7/065 (2013.01);
Abstract

A memory array includes a plurality of column segments, each column segment including a plurality of columns of memory cells, a plurality of sense amplifiers selectively coupled to each column of the plurality of columns of a corresponding column segment, pluralities of first and second reference cells, and a reference current circuit. The reference current circuit generates a reference current based on a first current generated by a first reference cell programmed to a low logical value and a second current generated by a second reference cell programmed to a high logical value. Each sense amplifier generates a mirror current based on the reference current, and a logical value based on a comparison of the mirror current to a cell current received from a memory cell of a column of the plurality of columns of the corresponding column segment.


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