The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2023
Filed:
Aug. 06, 2021
Applicant:
Changxin Memory Technologies, Inc., Anhui, CN;
Inventor:
Wei Xu, Hefei, CN;
Assignee:
CHANGXIN MEMORY TECHNOLOGIES, INC., Hefei, CN;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G03F 7/20 (2006.01); H01L 27/02 (2006.01); G06F 30/392 (2020.01); G06F 30/398 (2020.01); G06F 119/22 (2020.01);
U.S. Cl.
CPC ...
G06F 30/392 (2020.01); G03F 7/70433 (2013.01); G06F 30/398 (2020.01); G06F 2119/22 (2020.01); H01L 27/0207 (2013.01);
Abstract
Embodiments of the present application relate to the technical field of semiconductor, and disclose a design method of a wafer layout and an exposure system of a lithography machine. The design method of a wafer layout includes: providing a yield distribution map of a wafer under an initial wafer layout; determining a yield edge position of the wafer according to the yield distribution map; and calculating a new wafer layout according to a die size and the yield edge position.