The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 23, 2023
Filed:
Jul. 14, 2020
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventor:
Mohammad Abdallah, Folsom, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/38 (2018.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/3838 (2013.01); G06F 9/3005 (2013.01); G06F 9/3012 (2013.01); G06F 9/30094 (2013.01); G06F 9/30145 (2013.01); G06F 9/30174 (2013.01); G06F 9/384 (2013.01); G06F 9/3814 (2013.01); G06F 9/3836 (2013.01); G06F 9/3851 (2013.01); G06F 9/3863 (2013.01); G06F 9/3893 (2013.01);
Abstract
A method for emulating a guest centralized flag architecture by using a native distributed flag architecture. The method includes receiving an incoming instruction sequence using a global front end; grouping the instructions to form instruction blocks, wherein each of the instruction blocks comprise two half blocks; scheduling the instructions of the instruction block to execute in accordance with a scheduler; and using a distributed flag architecture to emulate a centralized flag architecture for the emulation of guest instruction execution.