The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 23, 2023

Filed:

Aug. 26, 2021
Applicant:

Montage Technology Co., Ltd., Shanghai, CN;

Inventors:

Ye Yang, Shanghai, CN;

Jingzhong Yang, Shanghai, CN;

Gang Shan, Shanghai, CN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 3/06 (2006.01); G06F 12/1009 (2016.01);
U.S. Cl.
CPC ...
G06F 3/0644 (2013.01); G06F 3/0604 (2013.01); G06F 3/0673 (2013.01); G06F 3/0683 (2013.01); G06F 12/1009 (2013.01);
Abstract

A computing system includes a host computing device and a slave computing device. The host computing device comprises a host processor, a host device memory and a host address mapping management. The host address mapping management manages a system memory page table, and converts, in response to a data access request from a processing process run on the host processor, requested virtual addresses into host device physical addresses based on the system memory page table to allow the processing process to access corresponding host storage units. The slave computing device includes a slave processor callable by the host processor to assist the host processor in running the processing processes, a slave device memory and a slave address mapping management unit. The slave address mapping unit converts, in response to a data access request of the processing process, requested virtual addresses into slave device physical addresses based on the slave device memory page table, to allow the slave processor to access corresponding slave storage units to assist the host processor in running the processing process.


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