The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2023

Filed:

Dec. 21, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Alpa Trivedi, Portland, OR (US);

Scott Weber, Piedmont, CA (US);

Steffen Schulz, Darmstadt, DE;

Patrick Koeberl, Alsbach-Haenlein, DE;

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/76 (2013.01); G06F 21/57 (2013.01); G06F 21/53 (2013.01); G06F 21/30 (2013.01); G06F 21/85 (2013.01); G06F 30/398 (2020.01); G06N 3/04 (2023.01); H04L 9/08 (2006.01); G06F 9/30 (2018.01); G06F 9/50 (2006.01); G06F 15/177 (2006.01); G06F 15/78 (2006.01); H04L 9/40 (2022.01); G06F 11/07 (2006.01); G06F 30/331 (2020.01); G06F 9/38 (2018.01); G06F 11/30 (2006.01); G06F 119/12 (2020.01); G06N 3/08 (2023.01); H04L 9/00 (2022.01); G06F 111/04 (2020.01); G06F 30/31 (2020.01); G06F 21/73 (2013.01); G06F 21/74 (2013.01); G06N 20/00 (2019.01); G06F 21/71 (2013.01); G06F 21/44 (2013.01);
U.S. Cl.
CPC ...
G06F 21/85 (2013.01); G06F 9/30101 (2013.01); G06F 9/3877 (2013.01); G06F 9/505 (2013.01); G06F 11/0709 (2013.01); G06F 11/0751 (2013.01); G06F 11/0754 (2013.01); G06F 11/0793 (2013.01); G06F 11/3058 (2013.01); G06F 15/177 (2013.01); G06F 15/7825 (2013.01); G06F 15/7867 (2013.01); G06F 30/331 (2020.01); G06F 30/398 (2020.01); G06N 3/04 (2013.01); H04L 9/0877 (2013.01); H04L 63/0442 (2013.01); H04L 63/12 (2013.01); H04L 63/20 (2013.01); G06F 11/0772 (2013.01); G06F 11/3051 (2013.01); G06F 21/30 (2013.01); G06F 21/44 (2013.01); G06F 21/53 (2013.01); G06F 21/57 (2013.01); G06F 21/575 (2013.01); G06F 21/71 (2013.01); G06F 21/73 (2013.01); G06F 21/74 (2013.01); G06F 21/76 (2013.01); G06F 30/31 (2020.01); G06F 2111/04 (2020.01); G06F 2119/12 (2020.01); G06F 2221/034 (2013.01); G06N 3/08 (2013.01); G06N 20/00 (2019.01); H04L 9/008 (2013.01); H04L 9/0841 (2013.01);
Abstract

An apparatus to facilitate enabling secure state-clean during configuration of partial reconfiguration bitstreams on accelerator devices is disclosed. The apparatus includes a security engine to receive an incoming partial reconfiguration (PR) bitstream corresponding to a new PR persona to configure a region of the apparatus; perform, as part of a PR configuration sequence for the new PR persona, a first clear operation to clear previously-set persona configuration bits in the region; perform, as part of the PR configuration sequence subsequent to the first clear operation, a set operation to set new persona configuration bits in the region; and perform, as part of the PR configuration sequence, a second clear operation to clear memory blocks of the region that became unfrozen subsequent to the set operation, the second clear operation performed using a persona-dependent mask corresponding to the new PR persona.


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