The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2023

Filed:

Sep. 25, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Reuven Elbaum, Haifa, IL;

Chaim Shen-Orr, Haifa, IL;

Assaf Admoni, Herzliya, IL;

Assignee:

INTEL CORPORATION, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/34 (2006.01); G06F 11/07 (2006.01); G06F 9/48 (2006.01); G06F 9/38 (2018.01); G06F 11/32 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3409 (2013.01); G06F 9/3836 (2013.01); G06F 9/4868 (2013.01); G06F 11/0772 (2013.01); G06F 11/327 (2013.01);
Abstract

Micro-architectural fault detectors are described. An example of storage mediums includes instructions for receiving one or more micro instructions for scheduling in a processor, the processor including one or more processing resources; and performing fault detection in performance of the one or more micro instructions utilizing one or more of a first idle canary detection mode, wherein the first mode includes assigning at least one component as an idle canary detector to perform a canary process with an expected outcome, and a second micro-architectural redundancy execution mode, wherein the second mode includes replicating a first micro instruction to generate micro instructions for performance by a set of processing resources.


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