The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2023

Filed:

Dec. 09, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Andrea Gotti, Boise, ID (US);

Dale W. Collins, Boise, ID (US);

Fabio Pellizzer, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 45/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/1246 (2013.01); H01L 27/2481 (2013.01); H01L 45/06 (2013.01); H01L 45/1233 (2013.01); H01L 45/1253 (2013.01); H01L 45/141 (2013.01); H01L 45/16 (2013.01);
Abstract

Methods, systems, and devices for a resistive interface material are described. A memory device may be fabricated using a sequence of steps that include forming a stack of materials by depositing a first metal layer, depositing a first electrode layer on the metal layer, depositing a memory material on the first electrode layer to form one or more memory cells, depositing a second electrode layer on the memory material, and depositing a second metal layer on the second electrode layer. A lamina (or multiple) having a relatively high resistivity may be included in the stack of materials to reduce or eliminate a current spike that may otherwise occur across the memory cells during an access operation.


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