The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2023

Filed:

Dec. 23, 2020
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Xin Miao, Guilderland, NY (US);

Chen Zhang, Albany, NY (US);

Kangguo Cheng, Schenectady, NY (US);

Wenyu Xu, Albany, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 21/02 (2006.01); H01L 27/12 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 29/161 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01); H01L 29/737 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823821 (2013.01); H01L 21/02381 (2013.01); H01L 21/02422 (2013.01); H01L 21/02428 (2013.01); H01L 21/02647 (2013.01); H01L 21/823807 (2013.01); H01L 27/1211 (2013.01); H01L 29/1054 (2013.01); H01L 29/161 (2013.01); H01L 29/20 (2013.01); H01L 29/66795 (2013.01); H01L 29/7378 (2013.01); H01L 29/785 (2013.01); H01L 29/786 (2013.01);
Abstract

The subject disclosure relates to high mobility complementary metal-oxide-semiconductor (CMOS) devices and techniques for forming the CMOS devices with fins formed directly on the insulator. According to an embodiment, a method for forming such a high mobility CMOS device can comprise forming, via a first epitaxial growth of a first material, first pillars within first trenches formed within a dielectric layer, wherein the dielectric layer is formed on a silicon substrate, and wherein the first pillars comprise first portions with defects and second portions without the defects. The method can further comprise forming second trenches within a first region of the dielectric layer, and further forming second pillars within the second trenches via a second epitaxial growth of one or more second materials using the second portions of the first pillars as seeds for the second epitaxial growth.


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