The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 25, 2023

Filed:

Oct. 20, 2021
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventor:

Kaoru Mori, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/22 (2006.01); G11C 7/20 (2006.01); G11C 8/18 (2006.01); G11C 8/06 (2006.01); H03K 19/17728 (2020.01); H03K 19/017 (2006.01);
U.S. Cl.
CPC ...
G11C 8/18 (2013.01); G11C 7/20 (2013.01); G11C 7/222 (2013.01); G11C 8/06 (2013.01); H03K 19/01742 (2013.01); H03K 19/17728 (2013.01);
Abstract

A memory system includes memory chips connected to each other. Each of the memory chips includes a memory array, a read/write data strobe pin, a look-up table storage device, a chip number identification circuit, and a control logic circuit. The memory array stores data. The read/write data strobe pin is connected to read/write data strobe pins of other memory chips. The look-up table storage device stores a plurality of trimming shift values related to a number of chip connections in advance. The chip number identification circuit identifies a current number of chip connections according to a state information, and finds a selected trimming shift value from the look-up table storage device. The control logic circuit transmits a data signal in response to a clock signal, and adjusts a setup hold time between the clock signal and the data signal according to the selected trimming shift value.


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