Determining read voltages for memory systems

Abstract

Methods, devices, and systems for determining read voltages for memory systems are provided. In one aspect, a memory device includes an array of memory cells, an accumulating circuit, and a controller. Each of the memory cells is coupled to a corresponding word line of multiple word lines and a corresponding bit line of multiple bit lines. The accumulating circuit is configured to: when data stored in a page is read out by applying each of a plurality of read voltages on a word line corresponding to the page, accumulate read-out signals from multiple memory cells in the page to generate a respective output value that corresponds to the accumulated read-out signals for the read voltage. The controller is configured to determine a calibrated read voltage for the page based on the respective output values and the plurality of read voltages.