The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2023

Filed:

Feb. 12, 2021
Applicant:

Synopsys, Inc., Mountain View, CA (US);

Inventors:

Jayanta Roy, San Jose, CA (US);

Ajay Singh Bisht, San Jose, CA (US);

Mark William Brown, Little Elm, TX (US);

Arney Deshpande, Sunnyvale, CA (US);

Yibing Wang, Santa Clara, CA (US);

Ramakrishnan Balasubramanian, San Jose, CA (US);

Assignee:

Synopsys, Inc., Mountain View, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 30/30 (2020.01); G06F 30/3308 (2020.01); G06F 9/54 (2006.01); G06F 111/02 (2020.01);
U.S. Cl.
CPC ...
G06F 30/3308 (2020.01); G06F 9/547 (2013.01); G06F 2111/02 (2020.01);
Abstract

Systems and methods for integrated circuit (IC) analysis using a multi-level data hierarchy implemented on a distributed compute and data infrastructure are described. An IC design may be represented using a set of storage areas, where each storage area may be stored in a contiguous block of storage and may correspond to a portion of the IC design. An analysis application may be executed on the IC design, where a subset of the set of storage areas that is used by the analysis application may be retrieved on-demand.


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