The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2023
Filed:
Apr. 12, 2018
Intel Corporation, Santa Clara, CA (US);
John Browne, Limerick, IE;
Chris MacNamara, Limerick, IE;
Tomasz Kantecki, Ennis, IE;
Peter McCarthy, Ennis, IE;
Liang Ma, Shannon, IE;
Mairtin O'Loingsigh, Shannon, IE;
Rory Sexton, Fermoy Cork, IE;
John Griffin, Charleville, IE;
Nemanja Marjanovic, Galway, IE;
David Hunt, Meelick, IE;
Intel Corporation, Santa Clara, CA (US);
Abstract
Technologies for power-aware scheduling include a computing device that receives network packets. The computing device classifies the network packets by priority level and then assigns each network packet to a performance group bin. The packets are assigned based on priority level and other performance criteria. The computing device schedules the network packets assigned to each performance group for processing by a processing engine such as a processor core. Network packets assigned to performance groups having a high priority level are scheduled for processing by processing engines with a high performance level. The computing device may select performance levels for processing engines based on processing workload of the network packets. The computing device may control the performance level of the processing engines, for example by controlling the frequency of processor cores. The processing workload may include packet encryption. Other embodiments are described and claimed.