The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2023

Filed:

Mar. 07, 2022
Applicant:

Integrated Silicon Solution, (Cayman) Inc., Grand Cayman, KY;

Inventors:

Andrew J. Walker, Mountain View, CA (US);

Dafna Beery, Palo Alto, CA (US);

Peter Cuevas, Los Gatos, CA (US);

Amitay Levi, Cupertino, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/108 (2006.01); H01L 29/06 (2006.01); H01L 29/66 (2006.01); H01L 29/161 (2006.01); H01L 29/20 (2006.01); H01L 29/78 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10808 (2013.01); H01L 27/10855 (2013.01); H01L 27/10873 (2013.01); H01L 27/10891 (2013.01); H01L 29/0649 (2013.01); H01L 29/16 (2013.01); H01L 29/161 (2013.01); H01L 29/20 (2013.01); H01L 29/66522 (2013.01); H01L 29/66666 (2013.01); H01L 29/7827 (2013.01);
Abstract

A method for manufacturing a dynamic random access memory device includes providing a semiconductor substrate and forming a highly doped diffusion region in a surface of the semiconductor substrate. A wordline structure is then deposited on the surface of the semiconductor substrate, where the wordline structure includes an electrically conductive gate layer. An opening is further formed in the wordline structure, where the opening is located at a first end of and extending to the highly doped diffusion region. A semiconductor pillar is then formed in the opening by selective epitaxial growth. An end of the semiconductor pillar is then doped and the doped end is connected with a memory element.


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