The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 11, 2023
Filed:
Oct. 01, 2019
Qualcomm Incorporated, San Diego, CA (US);
Daniel Garcia, San Diego, CA (US);
Kinfegebriel Amera Mengistie, San Diego, CA (US);
Francesco Carrara, San Diego, CA (US);
Chang-Ho Lee, San Diego, CA (US);
Ashish Alawani, San Diego, CA (US);
Mark Kuhlman, Laguna Niguel, CA (US);
John Jong-Hoon Lee, San Diego, CA (US);
Jeongkeun Kim, San Diego, CA (US);
Xiaoju Yu, San Diego, CA (US);
Supatta Niramarnkarn, Santee, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A package that includes a substrate having a first surface; a solder resist layer coupled to the first surface of the substrate; a device located over the solder resist layer such that a portion of the device touches the solder resist layer; and an encapsulation layer located over the solder resist layer such that the encapsulation layer encapsulates the device. The solder resist layer is configured as a seating plane for the device. The device is located over the solder resist layer such that a surface of the device facing the substrate is approximately parallel to the first surface of the substrate. The solder resist layer includes at least one notch. The device is located over the solder resist layer such that at least one corner of the device touches the at least one notch.