The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2023

Filed:

Oct. 23, 2020
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

David A. Roberts, Santa Cruz, CA (US);

J. Thomas Pawlowski, Boise, ID (US);

Robert Walker, Raleigh, NC (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 13/16 (2006.01);
U.S. Cl.
CPC ...
G06F 12/023 (2013.01); G06F 12/0292 (2013.01); G06F 13/1694 (2013.01); Y02D 10/00 (2018.01);
Abstract

Apparatuses and methods for adaptive control of memory are disclosed. One example apparatus includes a memory translation unit configured to receive a memory access request including a requested address and to determine a mapping state of a region of a memory associated with the requested address. The memory translation unit further configured to provide a mapped address to the memory. The mapped address is selected from one of the requested address or a translated requested address based on the state of the region of the memory associated with the requested address.


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Roberts, David. (2023). Apparatuses and methods for memory address translation during block migration using depth mapping table based on mapping state (U.S. Patent No. 11625321). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11625321

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