The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2023

Filed:

Sep. 08, 2021
Applicant:

Winbond Electronics Corp., Taichung, TW;

Inventors:

Jin-Neng Wu, Taichung, TW;

Yen-Jui Chu, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/13 (2013.01); H01L 24/11 (2013.01); H01L 2224/1132 (2013.01); H01L 2224/13008 (2013.01); H01L 2224/13239 (2013.01); H01L 2224/13247 (2013.01); H01L 2224/13564 (2013.01);
Abstract

Provided is a circuit structure including a substrate, a pad, a dielectric layer, a conductive layer, an adhesion layer, and a conductive bump. The pad is disposed on the substrate. The dielectric layer is disposed on the substrate and exposes a portion of the pad. The conductive layer contacts the pad and extends from the pad to cover a top surface of the dielectric layer. The adhesion layer is disposed between the dielectric layer and the conductive layer. The conductive bump extends in an upward manner from a top surface of the conductive layer. The conductive bump and the conductive layer are integrally formed. A method of manufacturing the circuit structure is also provided.


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