Method of making nanosheet local capacitors and nvm devices

Abstract

A semiconductor device and fabrication method are described for integrating a nanosheet transistor with a capacitor or nonvolatile memory cell in a single nanosheet process flow by forming a nanosheet transistor stack (-) of alternating Si and SiGe layers which are selectively processed to form epitaxial source/drain regions (A,B) and to form gate electrodes (A-D) which replace the silicon germanium layers in the nanosheet transistor stack, and then selectively forming one or more insulated conductive electrode layers (e.g.,) adjacent to the nanosheet transistor to define a capacitor or nonvolatile memory cell that is integrated with the nanosheet transistor.