The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2023

Filed:

Jan. 28, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventors:

Naveen Kaushik, Boise, ID (US);

Sidhartha Gupta, Boise, ID (US);

Pankaj Sharma, Boise, ID (US);

Haitao Liu, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/522 (2006.01); H01L 27/11582 (2017.01); G11C 5/06 (2006.01); H01L 21/48 (2006.01); H01L 21/768 (2006.01); H01L 27/11556 (2017.01);
U.S. Cl.
CPC ...
H01L 23/5226 (2013.01); G11C 5/06 (2013.01); H01L 21/486 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

A method of forming a microelectronic device comprises forming a stack structure comprising vertically alternating insulating structures and conductive structures arranged in tiers. Each of the tiers individually comprises one of the insulating structures and one of the conductive structures. A sacrificial material is formed over the stack structure and pillar structures are formed to extend vertically through the stack structure and the sacrificial material. The method comprises forming conductive plug structures within upper portions of the pillar structures, forming slots extending vertically through the stack structure and the sacrificial material, at least partially removing the sacrificial material to form openings horizontally interposed between the conductive plug structures, and forming a low-K dielectric material within the openings. Microelectronic devices, memory devices, and electronic systems are also described.


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