The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2023

Filed:

Sep. 28, 2020
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Haiyang Zhang, Shanghai, CN;

Panpan Liu, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/092 (2006.01); H01L 21/8234 (2006.01); H01L 29/78 (2006.01); H01L 21/3213 (2006.01); H01L 29/66 (2006.01); H01L 21/321 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0924 (2013.01); H01L 21/3212 (2013.01); H01L 21/32136 (2013.01); H01L 21/823431 (2013.01); H01L 21/823475 (2013.01); H01L 21/823481 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

A semiconductor structure and its fabrication method are provided in the present disclosure. The method includes providing a substrate, forming a plurality of fins on the substrate, and forming an isolation structure layer including a plurality of isolation structures on the substrate, each isolation structure being formed between adjacent fins. The method further includes forming a first opening by etching at least one isolation structure of the plurality of isolation structures and a portion of the substrate, and forming a power rail by filling the first opening with a conductive material, where a top surface of the power rail is lower than a top surface of the plurality of fins.


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