The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2023

Filed:

Dec. 20, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Ahmad Samih, Austin, TX (US);

Rajshree Chabukswar, Sunnyvale, CA (US);

Russell Fenger, Beaverton, OR (US);

Shadi Khasawneh, Austin, TX (US);

Vijay Dhanraj, Beaverton, OR (US);

Muhammad Abozaed, Portland, OR (US);

Mukund Ramakrishna, Austin, TX (US);

Atsuo Kuwahara, Portland, OR (US);

Guruprasad Settuvalli, Hillsboro, OR (US);

Eugene Gorbatov, Hillsboro, OR (US);

Monica Gupta, Santa Clara, CA (US);

Christine M. Lin, Sunnyvale, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/46 (2006.01); G06F 9/48 (2006.01); G06F 9/50 (2006.01); G06F 9/30 (2018.01);
U.S. Cl.
CPC ...
G06F 9/4831 (2013.01); G06F 9/30101 (2013.01); G06F 9/5011 (2013.01);
Abstract

The present disclosure is directed to dynamically prioritizing, selecting or ordering a plurality threads for execution by processor circuitry based on a quality of service and/or class of service value/indicia assigned to the thread by an operating system executed by the processor circuitry. As threads are executed by processor circuitry, the operating system dynamically updates/associates respective class of service data with each of the plurality of threads. The current quality of service/class of service data assigned to the thread by the operating system is stored in a manufacturer specific register (MSR) associated with the respective thread. Selection circuitry polls the MSRs on a periodic, aperiodic, intermittent, continuous, or event-driven basis and determines an execution sequence based on the current class of service value associated with each of the plurality of threads.


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