The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2023
Filed:
May. 26, 2021
Avary Holding (Shenzhen) Co., Limited., Shenzhen, CN;
Qing Ding Precision Electronics (Huaian) Co., Ltd, Huai an, CN;
Garuda Technology Co., Ltd., New Taipei, TW;
Jia-He Li, Shenzhen, CN;
Yong-Chao Wei, Qinhuangdao, CN;
Avary Holding (Shenzhen) Co., Limited., Shenzhen, CN;
QING DING PRECISION ELECTRONICS (HUAIAN) CO., LTD, Huai an, CN;
GARUDA TECHNOLOGY CO., LTD., New Taipei, TW;
Abstract
A method for manufacturing a circuit board including the following steps: providing a flexible double-sided metal-clad laminate including a first metal foil, a flexible dielectric layer, and a second metal foil. A carrier is attached to the second metal foil. A first wiring layer including a first wiring region and a second wiring region is formed by the first metal foil. The first wiring region includes a first connecting pad, and the second wiring region includes a connecting pad. A plurality of rigid dielectric blocks surrounded to form an interval and a first groove exposing the first connecting pad is pressed on the flexible dielectric layer to form a rigid dielectric layer. An electronic component is fixed the first groove. The carrier is removed. The intermediate structure is bent along the interval and pressed. A second wiring layer is formed by the second metal foil.