The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2023

Filed:

Jun. 21, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;

Inventors:

I-Hsiu Wang, Tainan County, TW;

Yean-Zhaw Chen, Tainan, TW;

Ying-Ting Hsia, Kaohsiung, TW;

Jhao-Ping Jiang, Changhua County, TW;

Chun-Chih Cheng, Changhua County, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/08 (2006.01); H01L 21/8238 (2006.01); H01L 21/768 (2006.01); H01L 23/532 (2006.01); H01L 29/66 (2006.01); H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 21/306 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0847 (2013.01); H01L 21/3085 (2013.01); H01L 21/30604 (2013.01); H01L 21/31144 (2013.01); H01L 21/76829 (2013.01); H01L 21/823814 (2013.01); H01L 21/823821 (2013.01); H01L 23/5329 (2013.01); H01L 29/6656 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, a pair of source/drain regions on the semiconductor substrate, and a gate structure on the semiconductor substrate and between the pair of source/drain regions. The gate structure includes a first metal layer and a second metal layer in contact with the first metal layer. A sidewall of the first metal layer and a top surface of the semiconductor substrate form a first included angle, a sidewall of the second metal layer and the top surface of the semiconductor substrate form a second included angle. The second included angle is different from the first included angle.


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