The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2023

Filed:

Feb. 24, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sung-Taeg Kang, Palo Alto, CA (US);

Pranav Kalavade, San Jose, CA (US);

Owen W. Jungroth, Sonora, CA (US);

Prasanna Srinivasan, Santa Clara, CA (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 23/532 (2006.01); H01L 21/3205 (2006.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 23/53271 (2013.01); H01L 21/32055 (2013.01); H01L 21/76892 (2013.01); H01L 23/528 (2013.01); H01L 23/53266 (2013.01); H01L 27/11556 (2013.01); H01L 27/11582 (2013.01);
Abstract

Apparatus, systems, or methods for a memory array having a plurality of word lines. A word line includes at least one word line plate, and the word line plate comprises a first material with a first resistivity. An edge of the word line plate is recessed and filled with a second material having a second resistivity that is lower than the first resistivity. As a result, the total resistance of the word line may be reduced compared to a word line using only the first material with the first resistivity. Other embodiments may also be described and claimed.


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