The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Nov. 20, 2019
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

James D. Wesselkamper, Albuquerque, NM (US);

Nathan A. Menhorn, Albuquerque, NM (US);

Jason J. Moore, Albuquerque, NM (US);

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 9/06 (2006.01); G11C 11/56 (2006.01); G11C 17/14 (2006.01); G11C 17/16 (2006.01); H04L 9/00 (2022.01);
U.S. Cl.
CPC ...
H04L 9/0618 (2013.01); G11C 11/5628 (2013.01); G11C 17/146 (2013.01); G11C 17/16 (2013.01); H04L 9/003 (2013.01);
Abstract

Disclosed approaches for validating initialization vectors determining by a configuration control circuit whether or not an input initialization vector is within a range of valid initialization vectors. In response to determining that the initialization vector is within the range of valid initialization vectors, the configuration control circuit decrypts the ciphertext into plaintext using the input initialization vector and configures a memory circuit with the plaintext. In response to determining that the first initialization vector is outside the range of valid initialization vectors, the configuration control circuit signals that the first initialization vector is invalid.


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