The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Sep. 13, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Sasikanth Manipatruni, Portland, OR (US);

Uygar Avci, Portland, OR (US);

Sou-Chi Chang, Portland, OR (US);

Ian Young, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01); H01L 29/51 (2006.01); H01L 29/78 (2006.01); H01L 27/11585 (2017.01); H01L 27/11502 (2017.01);
U.S. Cl.
CPC ...
H01L 29/516 (2013.01); G11C 11/221 (2013.01); G11C 11/223 (2013.01); H01L 27/11502 (2013.01); H01L 27/11585 (2013.01); H01L 29/78391 (2014.09);
Abstract

A capacitor is provided which comprises: a first structure comprising metal; a second structure comprising metal; and a third structure between the first and second structures, wherein the third structure comprises an improper ferroelectric material. In some embodiments, a field effect transistor (FET) is provided which comprises: a substrate; a source and drain adjacent to the substrate; and a gate stack between the source and drain, wherein the gate stack includes: a dielectric; a first structure comprising improper ferroelectric material, wherein the first structure is adjacent to the dielectric; and a second structure comprising metal, wherein the second structure is adjacent to the first structure.


Find Patent Forward Citations

Loading…