The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Dec. 26, 2020
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

David M. Durham, Beaverton, OR (US);

Karanvir S. Grewal, Hillsboro, OR (US);

Michael D. LeMay, Hillsboro, OR (US);

Salmin Sultana, Hillsboro, OR (US);

Andrew James Weiler, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/14 (2006.01); G06F 9/30 (2018.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1408 (2013.01); G06F 9/30101 (2013.01); G06F 9/5016 (2013.01); G06F 12/1441 (2013.01); G06F 12/1466 (2013.01);
Abstract

A processor includes a register to store an encoded pointer to a variable in stack memory. The encoded pointer includes an encrypted portion and a fixed plaintext portion of a memory address corresponding to the variable. The processor further includes circuitry to, in response to a memory access request for associated with the variable, decrypt the encrypted portion of the encoded pointer to obtain first upper address bits of the memory address and a memory allocation size for a variable, decode the encoded pointer to obtain the memory address, verify the memory address is valid based, at least in part on the memory allocation size, and in response to determining that the memory address is valid, allow the memory access request.


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