The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Apr. 06, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Andy Rudoff, Boulder, CO (US);

Tiffany J. Kasanicky, Longmont, CO (US);

Wei P. Chen, Portland, OR (US);

Rajat Agarwal, Portland, OR (US);

Chet R. Douglas, Tuscon, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2016.01); G06F 12/0891 (2016.01); G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0891 (2013.01); G06F 12/023 (2013.01);
Abstract

A memory management system includes a cache invalidation logic configured to invalidate, based a cache invalidation event, cache entries within a cache memory by having each cache entry, of the cache entries within the cache memory, reference a respective dummy address from among dummy addresses within a dummy address space, wherein the cache memory is assigned to a memory, the memory has a memory address space associated therewith to provide access the memory, and each dummy address of the dummy addresses within the dummy address space is distinct from any address of the memory address space.


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