The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Jan. 06, 2021
Applicant:

Micron Technology, Inc., Boise, ID (US);

Inventor:

Alan J. Wilson, Boise, ID (US);

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/20 (2006.01); G11C 17/16 (2006.01); G11C 17/18 (2006.01); G06F 11/10 (2006.01); G06F 3/06 (2006.01); G06F 12/02 (2006.01); G06F 11/16 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2094 (2013.01); G06F 3/0619 (2013.01); G06F 3/0655 (2013.01); G06F 3/0679 (2013.01); G06F 11/1008 (2013.01); G06F 11/1666 (2013.01); G06F 12/0207 (2013.01); G11C 17/16 (2013.01); G11C 17/18 (2013.01); G06F 2201/85 (2013.01);
Abstract

Techniques are provided for storing a row address of a defective row of memory cells to a bank of non-volatile storage elements (e.g., fuses or anti-fuses). After a memory device has been packaged, one or more rows of memory cells may become defective. In order to repair (e.g., replace) the rows, a post-package repair (PPR) operation may occur to replace the defective row with a redundant row of the memory array. To replace the defective row with a redundant row, an address of the defective row may be stored (e.g., mapped) to an available bank of non-volatile storage elements that is associated with a redundant row. Based on the bank of non-volatile storage elements the address of the defective row, subsequent access operations may utilize the redundant row and not the defective row.


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