The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Apr. 29, 2021
Applicant:

Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;

Inventor:

Chang-Lin Yeh, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04R 19/00 (2006.01); H04R 19/02 (2006.01); B81B 7/00 (2006.01); B81C 1/00 (2006.01); H04R 1/02 (2006.01); H04R 31/00 (2006.01); H04R 7/04 (2006.01);
U.S. Cl.
CPC ...
H04R 19/02 (2013.01); B81B 7/0061 (2013.01); B81C 1/00309 (2013.01); H04R 1/025 (2013.01); H04R 7/04 (2013.01); H04R 31/00 (2013.01); B81B 2201/0257 (2013.01); B81B 2203/0127 (2013.01); B81C 2201/0105 (2013.01); H04R 2201/003 (2013.01);
Abstract

A semiconductor package device and a method of manufacturing a semiconductor package device are provided. The semiconductor package device includes a substrate, a first electronic component, and an encapsulation layer. The substrate has a first surface, a second surface opposite to the first surface, and a first opening extending from the first surface to the second surface. The first electronic component is disposed on the first surface of the substrate. The encapsulation layer is formed on the second surface of the substrate. The encapsulation layer includes a chamber connected to the first opening, and a width of the first opening is smaller than a width of the chamber.


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