The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2023
Filed:
Nov. 16, 2020
Applicant:
Taiwan Semiconductor Manufacturing Company Ltd., Hsinchu, TW;
Inventor:
Chien Hung Liu, Hsinchu County, TW;
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD., Hsinchu, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11524 (2017.01); H01L 27/1157 (2017.01); H01L 27/11556 (2017.01); H01L 27/11582 (2017.01); H01L 27/105 (2006.01); H01L 27/11529 (2017.01); H01L 27/11548 (2017.01); H01L 27/11573 (2017.01); H01L 27/11575 (2017.01);
U.S. Cl.
CPC ...
H01L 27/11524 (2013.01); H01L 27/1052 (2013.01); H01L 27/1157 (2013.01); H01L 27/11548 (2013.01); H01L 27/11556 (2013.01); H01L 27/11573 (2013.01); H01L 27/11575 (2013.01); H01L 27/11582 (2013.01); H01L 27/11529 (2013.01);
Abstract
A method of forming a memory device is provided. The method comprises: forming a first storage portion on a substrate; forming a conductive layer on the first storage portion, wherein the conductive layer has a first surface coupled to the first storage portion; and forming a second storage portion on a second surface of the conductive layer, wherein the second surface is opposite to the first surface.